Status
Degate is in a pre-release phase. This means, there are some bugs and missing features. Degate is finished in a way, that you can see, how it works. And to a certain degree it will already help you in reverse engineering. The degate software was used to extract the DECT Standard Cipher and the encyption algorithm of Legic prime. It was also used to extract the memory encryption scheme of a common smard card processor familiy.
Extracting information out of images should be done by plugins. A framework for plugin handling exists. A first plugin for matching logic gates is working. A second plugin for matching wires is implemented, too.
A plugin for the detection of vias is planned.
In order to improve the software design the core was rewritten in C++. This step is done. Degate version 0.0.7 will include this rewritten core as an independently usable library.
Design rule checks should help to detect problems in the reverse engineered logic model. For example if there is an isolated via next to a wire, then this might indicate an error. DRCs are not implemented yet.
A circuit's netlist is a description of its structural domain. The netlist is derivable from the logic model. If you have a behavioural description of all gates, it is possible to generate rolled out VHDL or Verilog code. From that you can simmulate and resynthesize the circuit. This is not implemented yet.